In a portable audio device, a personal computer, a PHS, a portable telephone set or a portable electronic device, a power source circuit of a DC/DC converter constructed with a switching regulator for efficiently converting a power source voltage is utilized.
FIG. 4 is a block circuit diagram of an example of the switching regulator of the DC/DC converter of such kind.
A reference numeral 10 depicts a switching regulator circuit, 11 an error amplifier (Err), 12 a reference voltage generator circuit, 13 a PWM pulse generator circuit and 14 a driver. A reference numeral 15 depicts a switching circuit constructed with a series circuit of a P channel MOSFET Q and a Schottky diode D. The series circuit is provided between a power source line +Vcc (voltage of an input side DC power source) and ground GND.
A reference numeral 16 depicts an output terminal of the switching regulator circuit 10. A power capacitor Co is provided between the output terminal 16 and ground GND. An inductor L is provided between a connecting point between the transistor Q and the Schottky diode D and the output terminal 16. The inductor L is about 10 μH and the capacitor Co is about 150 μF. Further, a resistive voltage divider circuit 17 for detecting output voltage is provided between the output terminal 16 and ground GND. A voltage Vs detected by the resistive voltage divider circuit 17 is fed back to the error amplifier 11. The detection voltage Vs is compared in the error amplifier 11 with a comparative reference voltage Vref of the reference voltage generator circuit 12. An error voltage Eo (error detection signal) is generated in the error amplifier 11 correspondingly to a result of the comparison and inputted to the PWM pulse generator circuit 13. The PWM pulse generator circuit 13 is usually constructed with a comparator (COM) 13a and a triangular wave signal generator circuit 13b. 
In the PWM pulse generator circuit 13, a voltage waveform generated by the triangular wave generator circuit 13b is compared in the comparator 13a with an error voltage Eo in the comparator 13a. The triangular wave signal is sliced by the error voltage Eo, which corresponds to a result of the comparison of the voltage Vs, with a comparative reference voltage Vref and a PWM pulse is generated correspondingly to a pulse width determined by the slicing and is supplied to the driver 14. The driver 14 ON/OFF controls the transistor Q correspondingly to the pulse width of the PWM pulse to generate lowered voltage (boosted voltage by a fly-back pulse when the driver 14 is of a voltage boost type) at the output terminal 16.
Incidentally, the Schottky diode D is a flywheel diode for returning a current from the inductor L to the latter when the transistor Q is turned OFF.
Therefore, the transistor Q is ON/OFF controlled in such that the voltage divided by the resistive voltage divider circuit 17, that is, the detection voltage Vs, becomes equal to the comparative reference voltage Vref. As a result, an output voltage Vo is generated at the output terminal 16 and the output voltage Vo is stabilized to an aimed constant voltage Vta.
Incidentally, the driver 14 may be deleted when the output of the comparator 13a can drive the transistor Q. In such case, the output of the comparator 13a is directly supplied to the transistor Q.
The resistive voltage divider circuit 17 is constructed with a series circuit of resistors R1 and R2. The comparator 13a has two (−) input terminals for signals to be compared and an output of a soft start circuit 18 is supplied to one of the (−) input terminals.
The soft start circuit 18 functions to gradually boost an output voltage of the driver 14 by changing duty cycle of the PWM pulse to gradually increase the pulse width of the drive pulse. Since the transistor Q is a P channel transistor in FIG. 4, the width of the drive pulse outputted by the driver 14 is gradually increased in a LOW level period correspondingly to the change of the pulse width of the PWM pulse, so that the ON period of the transistor Q is increased correspondingly.
As the soft start circuit 18, a voltage generator circuit using a CR time constant circuit having a charging voltage of a capacitor as a threshold of a triangular wave or a soft start voltage generator circuit (Patent Publication 1) which utilizes a counter and a D/A converter and generates a voltage signal rising stepwise correspondingly to a clock CLK is known.
Particularly, in the voltage generator circuit having the CR time constant circuit as the soft start circuit 18, a capacitance of a secondary side capacitor Co is large. With such soft start circuit, it is beneficial in preventing rush current in a circuit which requires large stability with respect to an output current and in controlling output timing in a multi-channel power source circuit.
By providing such soft start circuit 18, the ON state period of the switching transistor Q becomes gradually longer and the charging current of the capacitor Co is gradually increased. Thus, a large current is prevented from flowing to the capacitor Co in the non-charged state at a start time, so that the switching transistor Q is hardly broken.
Patent Publication 1: JP-2004-23948A